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DATE
2006
IEEE
135views Hardware» more  DATE 2006»
16 years 22 days ago
FPGA architecture characterization for system level performance analysis
We present a modular and scalable approach for automatically extracting actual performance information from a set of FPGA-based architecture topologies. This information is used d...
Douglas Densmore, Adam Donlin, Alberto L. Sangiova...
CODES
2008
IEEE
16 years 1 months ago
Intra- and inter-processor hybrid performance modeling for MPSoC architectures
The heterogeneity of modern MPSoC architectures, coupled with the increasing complexity of the applications mapped onto them has recently led to a lot of interest in hybrid perfor...
Frank E. B. Ophelders, Samarjit Chakraborty, Henk ...
GI
2009
Springer
15 years 4 months ago
Fusion of IR/CCD Video Streams and Digital Terrain Models for Multi Target Tracking
: Video Streams of optical camera system are analysed by a video processing software which detects moving objects in the video. They are presented in image pixel coordinates. With ...
Kaeye Dästner, Bastian Köhler, Felix Opi...
FASE
2009
Springer
16 years 1 months ago
Transformation of Type Graphs with Inheritance for Ensuring Security in E-Government Networks
Abstract. E-government services usually process large amounts of confidential data. Therefore, security requirements for the communication between components have to be adhered in...
Frank Hermann, Hartmut Ehrig, Claudia Ermel
FPL
2001
Springer
96views Hardware» more  FPL 2001»
15 years 11 months ago
System Level Tools for DSP in FPGAs
Abstract. Visual data ow environments are ideally suited for modeling digital signal processing (DSP) systems, as many DSP algorithms are most naturally speci ed by signal ow gra...
James Hwang, Brent Milne, Nabeel Shirazi, Jeffrey ...