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ISLPED
2003
ACM
115views Hardware» more  ISLPED 2003»
16 years 2 days ago
Reducing energy and delay using efficient victim caches
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...
Gokhan Memik, Glenn Reinman, William H. Mangione-S...
LCTRTS
2010
Springer
15 years 11 months ago
Cache vulnerability equations for protecting data in embedded processor caches from soft errors
Continuous technology scaling has brought us to a point, where transistors have become extremely susceptible to cosmic radiation strikes, or soft errors. Inside the processor, cac...
Aviral Shrivastava, Jongeun Lee, Reiley Jeyapaul
HYBRID
2001
Springer
15 years 11 months ago
Accurate Event Detection for Simulating Hybrid Systems
It has been observed that there are a variety of situations in which the most popular hybrid simulation methods can fail to properly detect the occurrence of discrete events. In th...
Joel M. Esposito, Vijay Kumar, George J. Pappas
ICCAD
1997
IEEE
69views Hardware» more  ICCAD 1997»
15 years 11 months ago
Speeding up technology-independent timing optimization by network partitioning
Technology-independenttimingoptimizationis animportantproblem in logic synthesis. Although many promising techniques have been proposed in the past, unfortunately they are quite s...
Rajat Aggarwal, Rajeev Murgai, Masahiro Fujita
162
Voted
FP
1989
124views Formal Methods» more  FP 1989»
15 years 11 months ago
Deriving the Fast Fourier Algorithm by Calculation
This paper reports an explanation of an intricate algorithm in the terms of a potentially mechanisable rigorous-development method. It uses notations and techniques of Sheeran 1] ...
Geraint Jones