Sciweavers

7452 search results - page 61 / 1491
» A Semantics for Multiprocessor Systems
Sort
View
ECRTS
2010
IEEE
15 years 7 months ago
The Multiprocessor Bandwidth Inheritance Protocol
Abstract--In this paper, the Multiprocessor Bandwidth Inheritance (M-BWI) protocol is presented, which constitutes an extension of the Bandwidth Inheritance (BWI) protocol to symme...
Dario Faggioli, Giuseppe Lipari, Tommaso Cucinotta
CODES
2007
IEEE
16 years 15 days ago
Event-based re-training of statistical contention models for heterogeneous multiprocessors
Embedded single-chip heterogeneous multiprocessor (SCHM) systems experience frequent system events such as task preemption, power-saving voltage/frequency scaling, or arrival of n...
Alex Bobrek, JoAnn M. Paul, Donald E. Thomas
DAC
2001
ACM
16 years 7 months ago
Automatic Generation of Application-Specific Architectures for Heterogeneous Multiprocessor System-on-Chip
We present a design flow for the generation of application-specific multiprocessor architectures. In the flow, architectural parameters are first extracted from a high-level syste...
Damien Lyonnard, Sungjoo Yoo, Amer Baghdadi, Ahmed...
ECRTS
2007
IEEE
16 years 14 days ago
Integrating Hard/Soft Real-Time Tasks and Best-Effort Jobs on Multiprocessors
We present a multiprocessor scheduling framework for integrating hard and soft real-time tasks and best-effort jobs. This framework allows for full system utilization, and ensures...
Björn B. Brandenburg, James H. Anderson
MICRO
2007
IEEE
139views Hardware» more  MICRO 2007»
16 years 13 days ago
Stall-Time Fair Memory Access Scheduling for Chip Multiprocessors
DRAM memory is a major resource shared among cores in a chip multiprocessor (CMP) system. Memory requests from different threads can interfere with each other. Existing memory acc...
Onur Mutlu, Thomas Moscibroda