To support dynamic address translation in today's microprocessors, the first-level cache is accessed in parallel with a translation lookaside buffer (TLB). However, this curre...
Future chip multiprocessors (CMPs) may have hundreds to thousands of threads competing to access shared resources, and will require quality-of-service (QoS) support to improve sys...
PLT develops foundations for building reliable, high-performance software. Foundations include practices, languages, semantics, implementation techniques and type systems. To dem...
This paper argues for new computational mechanisms to aid specification of requirements for composite systems. It presents mechanisms for storing specification fragments, or viewp...
Neil A. M. Maiden, Alistair G. Sutcliffe, Petia As...
In this paper we give an operational semantics and introduce an assertional proof system for exceptions in a multithreaded Java sublanguage. Key words: Java, multi-threading, exce...