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» A Semantics for Multiprocessor Systems
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DAC
2008
ACM
16 years 7 months ago
A reconfigurable routing algorithm for a fault-tolerant 2D-Mesh Network-on-Chip
In this paper we present a reconfigurable routing algorithm for a 2D-Mesh Network-on-Chip (NoC) dedicated to faulttolerant, Massively Parallel Multi-Processors Systems on Chip (MP...
Zhen Zhang, Alain Greiner, Sami Taktak
ISORC
2009
IEEE
16 years 1 months ago
Thread-Local Scope Caching for Real-time Java
There is increasing convergence between the fields of parallel and embedded computing. The demand for more functionality in embedded devices means that complex multicore architec...
Andy J. Wellings, Martin Schoeberl
SIPS
2008
IEEE
16 years 1 months ago
Scheduling of dataflow models within the Reconfigurable Video Coding framework
The upcoming Reconfigurable Video Coding (RVC) standard from MPEG (ISO/IEC SC29WG11) defines a library of coding tools to specify existing or new compressed video formats and deco...
Jani Boutellier, Veeranjaneyulu Sadhanala, Christo...
DSD
2007
IEEE
142views Hardware» more  DSD 2007»
16 years 1 months ago
Decoupling of Computation and Communication with a Communication Assist
Abstract. In an embedded multiprocessor system the minimum throughput and maximum latency of real-time applications are usually derived given the worst-case execution time of the s...
Arno Moonen, Marco Bekooij, Rene van den Berg, Jef...
ARC
2007
Springer
116views Hardware» more  ARC 2007»
16 years 28 days ago
Systematic Customization of On-Chip Crossbar Interconnects
Abstract. In this paper, we present a systematic design and implementation of reconfigurable interconnects on demand. The proposed on-chip interconnection network provides identic...
Jae Young Hur, Todor Stefanov, Stephan Wong, Stama...