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VLSID
2004
IEEE
107views VLSI» more  VLSID 2004»
16 years 6 months ago
Performance Analysis of Inter Cluster Communication Methods in VLIW Architecture
With increasing demands for high performance by embedded systems, especially by digital signal processing applications, embedded processors must increase available instruction lev...
Sourabh Saluja, Anshul Kumar
ICCD
2006
IEEE
128views Hardware» more  ICCD 2006»
16 years 3 months ago
Polaris: A System-Level Roadmap for On-Chip Interconnection Networks
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
Vassos Soteriou, Noel Eisley, Hangsheng Wang, Bin ...
BMCBI
2006
94views more  BMCBI 2006»
15 years 6 months ago
Fly-DPI: database of protein interactomes for D. melanogaster in the approach of systems biology
Background: Proteins control and mediate many biological activities of cells by interacting with other protein partners. This work presents a statistical model to predict protein ...
Chung-Yen Lin, Shu-Hwa Chen, Chi-Shiang Cho, Chia-...
PDP
2011
IEEE
14 years 10 months ago
Transport Optimization in Peer-to-Peer Networks
Abstract—The peer-to-peer networking concept has revolutionized the cost structure of Internet data dissemination by making large scale content delivery with low server cost feas...
Konstantin Miller, Adam Wolisz
DSD
2006
IEEE
131views Hardware» more  DSD 2006»
15 years 9 months ago
Designing Efficient Irregular Networks for Heterogeneous Systems-on-Chip
Abstract-- Networks-on-Chip will serve as the central integration platform in future complex SoC designs, composed of a large number of heterogeneous processing resources. Most res...
Christian Neeb, Norbert Wehn