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CHES
2007
Springer
118views Cryptology» more  CHES 2007»
15 years 10 months ago
AES Encryption Implementation and Analysis on Commodity Graphics Processing Units
Graphics Processing Units (GPUs) present large potential performance gains within stream processing applications over the standard CPU. These performance gains are best realised wh...
Owen Harrison, John Waldron
CODES
2005
IEEE
16 years 6 days ago
Power-smart system-on-chip architecture for embedded cryptosystems
In embedded cryptosystems, sensitive information can leak via timing, power, and electromagnetic channels. We introduce a novel power-smart system-on-chip architecture that provid...
Radu Muresan, Haleh Vahedi, Y. Zhanrong, Stefano G...
TVLSI
2008
187views more  TVLSI 2008»
15 years 6 months ago
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
Kingshuk Karuri, Anupam Chattopadhyay, Xiaolin Che...
IMCSIT
2010
15 years 3 months ago
Parallel, Massive Processing in SuperMatrix - a General Tool for Distributional Semantic Analysis of Corpus
The paper presents an extended version of the SuperMatrix system -- a general tool supporting automatic acquisition of lexical semantic relations from corpora. Extensions focus mai...
Bartosz Broda, Damian Jaworski, Maciej Piasecki
BMCBI
2007
139views more  BMCBI 2007»
15 years 6 months ago
Improving model predictions for RNA interference activities that use support vector machine regression by combining and filterin
Background: RNA interference (RNAi) is a naturally occurring phenomenon that results in the suppression of a target RNA sequence utilizing a variety of possible methods and pathwa...
Andrew S. Peek