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ICCD
2006
IEEE
97views Hardware» more  ICCD 2006»
16 years 3 months ago
Pesticide: Using SMT Processors to Improve Performance of Pointer Bug Detection
Pointer bugs associated with dynamically-allocated objects resulting in out-of-bounds memory access are an important class of software bugs. Because such bugs cannot be detected e...
Jin-Yi Wang, Yen-Shiang Shue, T. N. Vijaykumar, Sa...
ICDCS
2009
IEEE
16 years 1 months ago
Towards Optimal Resource Utilization in Heterogeneous P2P Streaming
Though plenty of research has been conducted to improve Internet P2P streaming quality perceived by endusers, little has been known about the upper bounds of achievable performanc...
Dongyu Liu, Fei Li, Songqing Chen
IPPS
2009
IEEE
16 years 1 months ago
CellMR: A framework for supporting mapreduce on asymmetric cell-based clusters
The use of asymmetric multi-core processors with onchip computational accelerators is becoming common in a variety of environments ranging from scientific computing to enterprise...
M. Mustafa Rafique, Benjamin Rose, Ali Raza Butt, ...
IPPS
2009
IEEE
16 years 1 months ago
Portable builds of HPC applications on diverse target platforms
—High-end machines at modern HPC centers are constantly undergoing hardware and system software upgrades – necessitating frequent rebuilds of application codes. The number of p...
Magdalena Slawiñska, Jaroslaw Slawinski, Va...
MICRO
2009
IEEE
132views Hardware» more  MICRO 2009»
16 years 1 months ago
EazyHTM: eager-lazy hardware transactional memory
Transactional Memory aims to provide a programming model that makes parallel programming easier. Hardware implementations of transactional memory (HTM) suffer from fewer overhead...
Sasa Tomic, Cristian Perfumo, Chinmay Eishan Kulka...