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WISA
2007
Springer
16 years 24 days ago
Iteration Bound Analysis and Throughput Optimum Architecture of SHA-256 (384, 512) for Hardware Implementations
Abstract. The hash algorithm forms the basis of many popular cryptographic protocols and it is therefore important to find throughput optimal implementations. Though there have be...
Yong Ki Lee, Herwin Chan, Ingrid Verbauwhede
AICT
2006
IEEE
201views Communications» more  AICT 2006»
16 years 23 days ago
Distributed Web Service Discovery Architecture
In this paper, we present a distributed Web service discovery architecture that is designed to be reliable, flexible and scalable. The architecture is based on the concept of dis...
Brahmananda Sapkota, Dumitru Roman, Sebastian Rysz...
ASAP
2006
IEEE
106views Hardware» more  ASAP 2006»
16 years 23 days ago
Throughput Optimized SHA-1 Architecture Using Unfolding Transformation
In this paper, we analyze the theoretical delay bound of the SHA-1 algorithm and propose architectures to achieve high throughput hardware implementations which approach this boun...
Yong Ki Lee, Herwin Chan, Ingrid Verbauwhede
CCECE
2006
IEEE
16 years 23 days ago
Linearization Techniques for Cross-Coupled Transconductor Circuits Used in Integrated Q-Enhanced LC Filters
Integrated Q-enhanced RF LC filters using negative resistances implemented using cross coupled pairs frequently suffer from poor linearity performance. Several linearization met...
Holly Pekau, Jim Kulyk, James W. Haslett, Leonid B...
DATE
2006
IEEE
108views Hardware» more  DATE 2006»
16 years 23 days ago
Automatic march tests generations for static linked faults in SRAMs
Static Linked Faults are considered an interesting class of memory faults. Their capability of influencing the behavior of other faults causes the hiding of the fault effect and m...
Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Gi...