Due to wire delay scalability and bandwidth limitations inherent in shared buses and dedicated links, packet-switched on-chip interconnection networks are fast emerging as the per...
Amit Kumar 0002, Li-Shiuan Peh, Partha Kundu, Nira...
Microprocessor design is undergoing a major paradigm shift towards multi-core designs, in anticipation that future performance gains will come from exploiting threadlevel parallel...
Richard A. Hankins, Gautham N. Chinya, Jamison D. ...
Due to shrinking technologies and increasing design sizes, it is becoming more difficult and expensive to distribute a global clock signal with low skew throughout a processor di...
—The design of computer and communication systems has been based, for decades, on the fundamental assumption that the objective of all users is to improve their own performance. ...
Small-form-factor, low-power wireless sensors—motes—are convenient to deploy, but lack the bandwidth to capture and transmit raw high-frequency data, such as human voices or n...
Ben Greenstein, Christopher Mar, Alex Pesterev, Sh...