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» A Performance Process Maturity Model
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ISQED
2005
IEEE
125views Hardware» more  ISQED 2005»
16 years 6 days ago
A New Method for Design of Robust Digital Circuits
As technology continues to scale beyond 100nm, there is a significant increase in performance uncertainty of CMOS logic due to process and environmental variations. Traditional c...
Dinesh Patil, Sunghee Yun, Seung-Jean Kim, Alvin C...
HAPTICS
2002
IEEE
15 years 11 months ago
Computationally Efficient Techniques for Real Time Surgical Simulation with Force Feedback
In this paper, we present computationally efficient algorithms for the real time simulation of minimally invasive surgical (MIS) procedures. To develop a surgical simulator for tr...
Jung Kim, Suvranu De, Mandayam A. Srinivasan
195
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ISSS
2002
IEEE
141views Hardware» more  ISSS 2002»
15 years 11 months ago
An Accelerated Datapath Width Optimization Scheme for Area Reduction of Embedded Systems
Datapath width optimization is very effective for reducing the area of a custom-made embedded system. The trivial way of optimization is to iteratively customize, evaluate, and r...
Hiroto Yasuura, Yun Cao, Mohammad Mesbah Uddin
164
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MICRO
2002
IEEE
97views Hardware» more  MICRO 2002»
15 years 11 months ago
Instruction fetch deferral using static slack
In this paper we present an approach to boosting performance and tolerating latency by deferring non-critical instructions into a deferred queue for later processing. As such, ins...
Gregory A. Muthler, David Crowe, Sanjay J. Patel, ...
MM
2009
ACM
175views Multimedia» more  MM 2009»
15 years 11 months ago
Near-duplicate video matching with transformation recognition
Nowadays, the issue of near-duplicate video matching has been extensively studied. However, transformation, which is one of the major causes of near-duplicates, has been little di...
Zhipeng Wu, Shuqiang Jiang, Qingming Huang