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» A Parallel Priority Data Structure with Applications
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178
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IPPS
2002
IEEE
15 years 11 months ago
Memory-Intensive Benchmarks: IRAM vs. Cache-Based Machines
The increasing gap between processor and memory performance has led to new architectural models for memory-intensive applications. In this paper, we use a set of memory-intensive ...
Brian R. Gaeke, Parry Husbands, Xiaoye S. Li, Leon...
203
Voted
JCST
2008
140views more  JCST 2008»
15 years 5 months ago
ROPAS: Cross-Layer Cognitive Architecture for Mobile UWB Networks
The allocation of bandwidth to unlicensed users, without significantly increasing the interference on the existing licensed users, is a challenge for Ultra Wideband (UWB) networks....
Chittabrata Ghosh, Bin Xie, Dharma P. Agrawal
ICS
2003
Tsinghua U.
15 years 11 months ago
miNI: reducing network interface memory requirements with dynamic handle lookup
Recent work in low-latency, high-bandwidth communication systems has resulted in building user–level Network InControllers (NICs) and communication abstractions that support dir...
Reza Azimi, Angelos Bilas
PPOPP
1997
ACM
15 years 10 months ago
Performance Implications of Communication Mechanisms in All-Software Global Address Space Systems
Global addressing of shared data simplifies parallel programming and complements message passing models commonly found in distributed memory machines. A number of programming sys...
Beng-Hong Lim, Chi-Chao Chang, Grzegorz Czajkowski...
ESA
1998
Springer
162views Algorithms» more  ESA 1998»
15 years 9 months ago
External Memory Algorithms
Abstract. Data sets in large applications are often too massive to t completely inside the computer's internal memory. The resulting input output communication or I O between ...
Jeffrey Scott Vitter