Hardware square-root units require large numbers of gates even for iterative implementations. In this paper, we present four low-cost high-performance fullypipelined n-select impl...
Memory expansions are classical means to extract parallelism from imperative programs. However, for dynamic control programs with general memory accesses, such transformations eit...
Denis Barthou, Albert Cohen, Jean-Francois Collard
An algorithm is presented that allows to perform skeletonization of large maps with much lower memory requirements than with the straightforward approach. The maps are divided int...
Albert M. Vossepoel, Klamer Schutte, Carl F. P. De...
E cient automatic model checking algorithms for real-time systems have been obtained in recent years based on the state region graph technique of Alur, Courcoubetis and Dill. Howev...
Thanks to their high performance and programmability, the latest graphics cards can now be used for scientific purpose. They are indeed very efficient parallel Single Instruction ...