— Balanced truncation (BT) model order reduction (MOR) is known for its superior accuracy and computable error bounds. Balanced stochastic truncation (BST) is a particular BT pro...
Pomegranate is a parallel hardware architecture for polygon rendering that provides scalable input bandwidth, triangle rate, pixel rate, texture memory and display bandwidth while...
Recently, there is a surge of interests in using FPGAs for computer architecture research including applications from emulating and analyzing a new platform to accelerating microa...
In this paper, we introduce new concepts and methods for checking the correctness of control flow instructions during the execution of programs in embedded CPUs. Detecting and avoi...
Plus BROWSE SEARCH IEEE XPLORE GUIDE SUPPORT View TOC Enhanced visual evaluation of feature extractors for image mining Rodrigues, J.F., Jr. Traina, A.J.M. Traina, C., Jr. Comput. ...