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ISPASS
2010
IEEE
16 years 1 months ago
Visualizing complex dynamics in many-core accelerator architectures
—While many-core accelerator architectures, such as today’s Graphics Processing Units (GPUs), offer orders of magnitude more raw computing power than contemporary CPUs, their m...
Aaron Ariel, Wilson W. L. Fung, Andrew E. Turner, ...
CARDIS
2008
Springer
153views Hardware» more  CARDIS 2008»
15 years 8 months ago
Ultra-Lightweight Implementations for Smart Devices - Security for 1000 Gate Equivalents
In recent years more and more security sensitive applications use passive smart devices such as contactless smart cards and RFID tags. Cost constraints imply a small hardware footp...
Carsten Rolfes, Axel Poschmann, Gregor Leander, Ch...
CAV
2009
Springer
134views Hardware» more  CAV 2009»
16 years 6 months ago
Predecessor Sets of Dynamic Pushdown Networks with Tree-Regular Constraints
Abstract. Dynamic Pushdown Networks (DPNs) are a model for parallel programs with (recursive) procedures and process creation. The goal of this paper is to develop generic techniqu...
Alexander Wenner, Markus Müller-Olm, Peter La...
VLSISP
2008
173views more  VLSISP 2008»
15 years 6 months ago
Fast Bit Gather, Bit Scatter and Bit Permutation Instructions for Commodity Microprocessors
Advanced bit manipulation operations are not efficiently supported by commodity word-oriented microprocessors. Programming tricks are typically devised to shorten the long sequence...
Yedidya Hilewitz, Ruby B. Lee
BMCBI
2007
148views more  BMCBI 2007»
15 years 6 months ago
fREDUCE: Detection of degenerate regulatory elements using correlation with expression
Background: The precision of transcriptional regulation is made possible by the specificity of physical interactions between transcription factors and their cognate binding sites ...
Randy Z. Wu, Christina Chaivorapol, Jiashun Zheng,...