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» A New Parallel Algorithm for Generalized LR Parsing
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TEC
2002
119views more  TEC 2002»
15 years 5 months ago
Graph-based evolutionary design of arithmetic circuits
Abstract--In this paper, we present an efficient graph-based evolutionary optimization technique called evolutionary graph generation (EGG) and the proposed approach is applied to ...
Dingjun Chen, Takafumi Aoki, Naofumi Homma, Toshik...
IEEEPACT
2007
IEEE
16 years 8 days ago
Automatic Correction of Loop Transformations
Loop nest optimization is a combinatorial problem. Due to the growing complexity of modern architectures, it involves two increasingly difficult tasks: (1) analyzing the profita...
Nicolas Vasilache, Albert Cohen, Louis-Noël P...
IPPS
1998
IEEE
15 years 10 months ago
Optimistic Synchronization of Mixed-Mode Simulators
Mixed-Mode simulation has been generating considerable interest in the simulation community and has continued to grow as an active research area. Traditional mixed-mode simulation...
Peter Frey, Radharamanan Radhakrishnan
DAC
2010
ACM
15 years 9 months ago
On the costs and benefits of stochasticity in stream processing
With the end of clock-frequency scaling, parallelism has emerged as the key driver of chip-performance growth. Yet, several factors undermine efficient simultaneous use of onchip ...
Raj R. Nadakuditi, Igor L. Markov
TCAD
2002
146views more  TCAD 2002»
15 years 5 months ago
Static scheduling of multidomain circuits for fast functional verification
With the advent of system-on-a-chip design, many application specific integrated circuits (ASICs) now require multiple design clocks that operate asynchronously to each other. This...
Murali Kudlugi, Russell Tessier