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TSE
2002
122views more  TSE 2002»
15 years 6 months ago
Virtual Benchmarking and Model Continuity in Prototyping Embedded Multiprocessor Signal Processing Systems
The complexity of hardware/software codesign of embedded real-time signal processing systems can be reduced by rapid system prototyping (RSP). However, existing RSP frameworks do n...
Randall S. Janka, Linda M. Wills, Lewis B. Baumsta...
ICCV
2007
IEEE
16 years 26 days ago
Total Recall: Automatic Query Expansion with a Generative Feature Model for Object Retrieval
Given a query image of an object, our objective is to retrieve all instances of that object in a large (1M+) image database. We adopt the bag-of-visual-words architecture which ha...
Ondrej Chum, James Philbin, Josef Sivic, Michael I...
CAV
2010
Springer
225views Hardware» more  CAV 2010»
15 years 10 months ago
Merit: An Interpolating Model-Checker
Abstract. We present the tool MERIT, a CEGAR model-checker for safety propf counter-systems, which sits in the Lazy Abstraction with Interpolants (LAWI) framework. LAWI is parametr...
Nicolas Caniart
IPPS
2010
IEEE
15 years 4 months ago
Modeling and analyzing the effects of firewalls and NATs in P2P swarming systems
Many P2P systems have been designed without taking into account an important factor: a large fraction of Internet users nowadays are located behind a network address translator (NA...
Lucia D'Acunto, Michel Meulpolder, Rameez Rahman, ...
DAC
2003
ACM
15 years 11 months ago
Instruction set compiled simulation: a technique for fast and flexible instruction set simulation
Instruction set simulators are critical tools for the exploration and validation of new programmable architectures. Due to increasing complexity of the architectures and timeto-ma...
Mehrdad Reshadi, Prabhat Mishra, Nikil D. Dutt