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» A New Architecture for Automated Modelling
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FMCAD
1998
Springer
15 years 11 months ago
Combining Symbolic Model Checking with Uninterpreted Functions for Out-of-Order Processor Verification
We present a new approach to the verification of hardware systems with data dependencies using temporal logic symbolic model checking. As a benchmark we take Tomasulo's algori...
Sergey Berezin, Armin Biere, Edmund M. Clarke, Yun...
ESEM
2007
ACM
15 years 10 months ago
Effort Prediction in Iterative Software Development Processes -- Incremental Versus Global Prediction Models
Estimation of development effort without imposing overhead on the project and the development team is of paramount importance for any software company. This study proposes a new e...
Pekka Abrahamsson, Raimund Moser, Witold Pedrycz, ...
156
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DAC
2009
ACM
16 years 7 months ago
Handling don't-care conditions in high-level synthesis and application for reducing initialized registers
Don't-care conditions provide additional flexibility in logic synthesis and optimization. However, most work only focuses on the gate level because it is difficult to handle ...
Hong-Zu Chou, Kai-Hui Chang, Sy-Yen Kuo
DAC
2009
ACM
16 years 7 months ago
Mode grouping for more effective generalized scheduling of dynamic dataflow applications
For a number of years, dataflow concepts have provided designers of digital signal processing systems with environments capable of expressing high-level software architectures as ...
William Plishker, Nimish Sane, Shuvra S. Bhattacha...
DAC
1998
ACM
16 years 7 months ago
A Case Study in Embedded System Design: An Engine Control Unit
A number of techniques and software tools for embedded system design have been recently proposed. However, the current practice in the designer community is heavily based on manua...
Alberto L. Sangiovanni-Vincentelli, Antonino Damia...