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ISCAS
2003
IEEE
331views Hardware» more  ISCAS 2003»
16 years 16 hour ago
Design of ultra high-speed CMOS CML buffers and latches
Abstract - A comprehensive study of ultra high-speed currentmode logic (CML) buffers and regenerative CML latches will be illustrated. A new design procedure to systematically desi...
Payam Heydari, Ravindran Mohanavelu
CORR
2002
Springer
128views Education» more  CORR 2002»
15 years 6 months ago
The Deductive Database System LDL++
This paper describes the LDL++ system and the research advances that have enabled its design and development. We begin by discussing the new nonmonotonic and nondeterministic cons...
Faiz Arni, KayLiang Ong, Shalom Tsur, Haixun Wang,...
ASPDAC
2008
ACM
130views Hardware» more  ASPDAC 2008»
15 years 8 months ago
Architecture-level thermal behavioral characterization for multi-core microprocessors
In this paper, we investigate a new architecture-level thermal characterization problem from behavioral modeling perspective to address the emerging thermal related analysis and o...
Duo Li, Sheldon X.-D. Tan, Murli Tirumala
CVPR
2008
IEEE
16 years 1 months ago
Bayesian tactile face
Computer users with visual impairment cannot access the rich graphical contents in print or digital media unless relying on visual-to-tactile conversion, which is done primarily b...
Zheshen Wang, Xinyu Xu, Baoxin Li
PROCEDIA
2011
14 years 9 months ago
A Multilevel Parallelism Support for Multi-Physics Coupling
A new challenge in scientific computing is to merge existing simulation models to create new higher fidelity combined (often multi-level) models. While this challenge has been a...
Fang Liu, Masha Sosonkina