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LFCS
2009
Springer
16 years 28 days ago
Completeness Results for Memory Logics
Memory logics are a family of modal logics in which standard relational structures are augmented with data structures and additional operations to modify and query these structure...
Carlos Areces, Santiago Figueira, Sergio Mera
CODES
2006
IEEE
16 years 14 days ago
Generic netlist representation for system and PE level design exploration
Designer productivity and design predictability are vital factors for successful embedded system design. Shrinking time-to-market and increasing complexity of these systems requir...
Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah,...
SSDBM
2005
IEEE
111views Database» more  SSDBM 2005»
15 years 12 months ago
Querying Streaming Geospatial Image Data: The GeoStreams Project
Data products generated from remotely-sensed, geospatial imagery (RSI) used in emerging areas, such as global climatology, environmental monitoring, land use, and disaster managem...
Quinn Hart, Michael Gertz
WCRE
2003
IEEE
15 years 11 months ago
GUI Ripping: Reverse Engineering of Graphical User Interfaces for Testing
Graphical user interfaces (GUIs) are important parts of today’s software and their correct execution is required to ensure the correctness of the overall software. A popular tec...
Atif M. Memon, Ishan Banerjee, Adithya Nagarajan
EVOW
2001
Springer
15 years 11 months ago
ARPIA: A High-Level Evolutionary Test Signal Generator
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...
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