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ISQED
2010
IEEE
141views Hardware» more  ISQED 2010»
16 years 1 months ago
Assessing chip-level impact of double patterning lithography
—Double patterning lithography (DPL) provides an attractive alternative or a supplementary method to enable the 32nm and 22nm process nodes, relative to costlier technology optio...
Kwangok Jeong, Andrew B. Kahng, Rasit Onur Topalog...
RTSS
2009
IEEE
16 years 1 months ago
On the Scheduling of Mixed-Criticality Real-Time Task Sets
Abstract—The functional consolidation induced by the costreduction trends in embedded systems can force tasks of different criticality (e.g. ABS Brakes with DVD) to share a proce...
Dionisio de Niz, Karthik Lakshmanan, Ragunathan Ra...
CIKM
2009
Springer
16 years 1 months ago
Reducing the risk of query expansion via robust constrained optimization
We introduce a new theoretical derivation, evaluation methods, and extensive empirical analysis for an automatic query expansion framework in which model estimation is cast as a r...
Kevyn Collins-Thompson
COCO
2009
Springer
105views Algorithms» more  COCO 2009»
16 years 1 months ago
Planar Graph Isomorphism is in Log-Space
Graph Isomorphism is the prime example of a computational problem with a wide difference between the best known lower and upper bounds on its complexity. There is a significant ...
Samir Datta, Nutan Limaye, Prajakta Nimbhorkar, Th...
COMPLEX
2009
Springer
16 years 1 months ago
Transforming Time Series into Complex Networks
We introduce transformations from time series data to the domain of complex networks which allow us to characterise the dynamics underlying the time series in terms of topological ...
Michael Small, Jie Zhang, Xiaoke Xu
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