Sciweavers

497 search results - page 79 / 100
» A Network on Chip Architecture and Design Methodology
Sort
View
DAC
2000
ACM
16 years 7 months ago
COSY communication IP's
The Esprit/OMI-COSY project defines transaction-levels to set-up the exchange of IP's in separating function from architecture and body-behavior from proprietary interfaces. ...
Erwin A. de Kock, Frédéric Pé...
FPL
1997
Springer
123views Hardware» more  FPL 1997»
15 years 10 months ago
P4: A platform for FPGA implementation of protocol boosters
Protocol Boosters are functional elements, inserted anddeleted fromnetwork protocol stacks on an as-neededbasis. The Protocol Booster design methodology attempts to improve end-to-...
Ilija Hadzic, Jonathan M. Smith
ATAL
2007
Springer
15 years 10 months ago
MAGENTA technology case studies of magenta i-scheduler for road transportation
The paper describes functionality of Magenta Multi-Agent Logistics i-Scheduler Engine presented on AAMAS 2006 conferences and gives examples of its application in business domain....
Petr Skobelev, Andrey Glaschenko, Ilya Grachev, Se...
PDP
2010
IEEE
15 years 10 months ago
Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
Antonio Flores, Juan L. Aragón, Manuel E. A...
AUTONOMICS
2008
ACM
15 years 8 months ago
MWM: a map-based world model for wireless sensor networks
A prominent functionality of a Wireless Sensor Network (WSN) is environmental monitoring. For this purpose the WSN creates a model for the real world by using abstractions to pars...
Abdelmajid Khelil, Faisal Karim Shaikh, Brahim Aya...