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DAC
2008
ACM
16 years 7 months ago
Topological routing to maximize routability for package substrate
Compared with on-chip routers, the existing commercial tools for off-chip routing have a much lower routability and often result in a large number of unrouted nets for manual rout...
Shenghua Liu, Guoqiang Chen, Tom Tong Jing, Lei He...
DAC
2008
ACM
16 years 7 months ago
Driver waveform computation for timing analysis with multiple voltage threshold driver models
This paper introduces an accurate and efficient electrical analysis of logic gates modeled as Multiple Voltage Threshold Models (MVTM) loaded by the associated interconnect. MVTMs...
Peter Feldmann, Soroush Abbaspour, Debjit Sinha, G...
169
Voted
DAC
2008
ACM
16 years 7 months ago
A progressive-ILP based routing algorithm for cross-referencing biochips
Due to recent advances in microfluidics technology, digital microfluidic biochips and their associated CAD problems have gained much attention, most of which has been devoted to d...
Ping-Hung Yuh, Sachin S. Sapatnekar, Chia-Lin Yang...
DAC
2007
ACM
16 years 7 months ago
Dynamic Power Management with Hybrid Power Sources
DPM (Dynamic Power Management) is an effective technique for reducing the energy consumption of embedded systems that is based on migrating to a low power state when possible. Whi...
Jianli Zhuo, Chaitali Chakrabarti, Kyungsoo Lee, N...
DAC
1999
ACM
16 years 7 months ago
Noise-Aware Repeater Insertion and Wire-Sizing for On-Chip Interconnect Using Hierarchical Moment-Matching
Recently, several algorithms for interconnect optimization via repeater insertion and wire sizing have appeared based on the Elmore delay model. Using the Devgan noise metric [6] ...
Chung-Ping Chen, Noel Menezes
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