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ICCD
2004
IEEE
106views Hardware» more  ICCD 2004»
16 years 3 months ago
Gate Sizing and V{t} Assignment for Active-Mode Leakage Power Reduction
Leakage current is a key factor in IC power consumption even in the active operating mode. We investigate the simultaneous optimization of gate size and threshold voltage to reduc...
Feng Gao, John P. Hayes
ICPPW
2000
IEEE
15 years 11 months ago
A Practical Realization of Parallel Disks
Several models of parallel disks are found in the literature. These models have been proposed to alleviate the I/O bottleneck arising in handling voluminous data. These models hav...
Sanguthevar Rajasekaran, Xiao-ming Jin
PARA
1995
Springer
15 years 10 months ago
Decomposing Linear Programs for Parallel Solution
Coarse grain parallelism inherent in the solution of Linear Programming (LP) problems with block angular constraint matrices has been exploited in recent research works. However, t...
Ali Pinar, Ümit V. Çatalyürek, Ce...
APCSAC
2005
IEEE
16 years 10 days ago
Rule-Based Power-Balanced VLIW Instruction Scheduling with Uncertainty
Abstract. Power-balanced instruction scheduling for Very Long Instruction Word (VLIW) processors is an optimization problem which requires a good instruction-level power model for ...
Shu Xiao, Edmund Ming-Kit Lai, A. Benjamin Premkum...
IJCAI
2007
15 years 8 months ago
Using Linear Programming for Bayesian Exploration in Markov Decision Processes
A key problem in reinforcement learning is finding a good balance between the need to explore the environment and the need to gain rewards by exploiting existing knowledge. Much ...
Pablo Samuel Castro, Doina Precup