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» A Modal Model of Memory
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MICRO
1997
IEEE
141views Hardware» more  MICRO 1997»
15 years 10 months ago
Unroll-and-Jam Using Uniformly Generated Sets
Modern architectural trends in instruction-level parallelism (ILP) are to increase the computational power of microprocessors significantly. As a result, the demands on memory ha...
Steve Carr, Yiping Guan
PODC
1990
ACM
15 years 10 months ago
Self-Stabilization of Dynamic Systems Assuming only Read/Write Atomicity
Three self-stabilizing protocols for distributed systems in the shared memory model are presented. The first protocol is a mutual exclusion protocol for tree structured systems. T...
Shlomi Dolev, Amos Israeli, Shlomo Moran
CF
2007
ACM
15 years 10 months ago
Massively parallel processing on a chip
MppSoC is a SIMD architecture composed of a grid of processors and memories connected by a X-Net neighbourhood network and a general purpose global router. MppSoC is an evolution ...
Philippe Marquet, Simon Duquennoy, Sébastie...
EH
2004
IEEE
117views Hardware» more  EH 2004»
15 years 10 months ago
Multi-objective Optimization of a Parameterized VLIW Architecture
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
ISHPC
2000
Springer
15 years 10 months ago
Automatic Generation of OpenMP Directives and Its Application to Computational Fluid Dynamics Codes
The shared-memory programming model is a very effective way to achieve parallelism on shared memory parallel computers. As great progress was made in hardware and software technolo...
Haoqiang Jin, Michael A. Frumkin, Jerry C. Yan