3394 search results - page 288 / 679 » A Modal Model of Memory |
187
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HIPEAC
2005
Springer
16 years 7 days ago
2005
Springer
Abstract. Power efficiency has become a key design trade-off in embedded system designs. For system-on-a-chip embedded systems, an external bus interconnects embedded processor co...
174
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IPPS
1998
IEEE
15 years 11 months ago
1998
IEEE
We have built an eight node SMP cluster called COMPaS (Cluster Of Multi-Processor Systems), each node of which is a quadprocessor Pentium Pro PC. We have designed and implemented a...
170
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ICRA
1993
IEEE
15 years 10 months ago
1993
IEEE
Navigationalpath planning is a classicalproblem in autonomous mobile robotics. Most AI approachesto path planning use goal-directedheuristicsearch of problem spaces defined by spa...
186
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WSC
2000
15 years 8 months ago
2000
This paper is focused on estimating the quality of the sample mean from a steady-state simulation experiment with consideration of computational efficiency, memory requirement, an...
179
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CPHYSICS
2010
15 years 6 months ago
2010
In this paper, a programming model is presented which enables scalable parallel performance on multi-core shared memory architectures. The model has been developed for application...