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GLVLSI
2007
IEEE
189views VLSI» more  GLVLSI 2007»
16 years 1 months ago
Hardware-accelerated path-delay fault grading of functional test programs for processor-based systems
The path-delay fault simulation of functional tests on complex circuits such as current processor-based systems is a daunting task. The amount of computing power and memory needed...
Paolo Bernardi, Michelangelo Grosso, Matteo Sonza ...
172
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IJCNN
2007
IEEE
16 years 1 months ago
System Identification for the Hodgkin-Huxley Model using Artificial Neural Networks
— A single biological neuron is able to perform complex computations that are highly nonlinear in nature, adaptive, and superior to the perceptron model. A neuron is essentially ...
Manish Saggar, Tekin Meriçli, Sari Andoni, ...
200
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HPCA
2005
IEEE
16 years 14 days ago
Exploring the Design Space of Power-Aware Opto-Electronic Networked Systems
As microprocessors become increasingly interconnected, the power consumed by the interconnection network can no longer be ignored. Moreover, with demand for link bandwidth increas...
Xuning Chen, Li-Shiuan Peh, Gu-Yeon Wei, Yue-Kai H...
SKG
2005
IEEE
16 years 13 days ago
Effective Maintenance of Materialized Views in Peer Data Management Systems
Materialized view is a useful tool to cache data in data warehouse, data replication, data visualization and etc. However, view maintenance in peer data management systems (PDMSs) ...
Biao Qin, Shan Wang, Xiaoyong Du
DATE
2003
IEEE
112views Hardware» more  DATE 2003»
16 years 4 days ago
Transaction-Level Models for AMBA Bus Architecture Using SystemC 2.0
The concept of a SOC platform architecture introduces the concept of a communication infrastructure. In the transaction-level a finite set of architecture components (memories, ar...
Marco Caldari, Massimo Conti, Massimo Coppola, Ste...