1609 search results - page 135 / 322 » A Microeconomic Scheduler for Parallel Computers |
153
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IPPS
1998
IEEE
15 years 10 months ago
1998
IEEE
We describe a family of reconfigurable parallel architectures for logic emulation. They are supposed to be applicable like conventional FPGAs, while covering a larger range of circ...
160
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SPAA
2010
ACM
15 years 4 months ago
2010
ACM
We describe parallel implementations of LU factorization with pivoting for multicore architectures. Implementations that differ in two different dimensions are discussed: (1) usin...
205
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PDP
2010
IEEE
15 years 10 months ago
2010
IEEE
Scheduling large amounts of tasks in distributed computing platforms composed of millions of nodes is a challenging goal, even more in a fully decentralized way and with low overhe...
179
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IOR
2007
15 years 6 months ago
2007
We combine mixed integer linear programming (MILP) and constraint programming (CP) to solve an important class of planning and scheduling problems. Tasks are allocated to faciliti...
286
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HIPC
2009
Springer
15 years 4 months ago
2009
Springer
The significant growth in computational power of modern Graphics Processing Units(GPUs) coupled with the advent of general purpose programming environments like NVIDA's CUDA,...