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TACAS
2010
Springer
178views Algorithms» more  TACAS 2010»
16 years 1 months ago
An Alternative to SAT-Based Approaches for Bit-Vectors
The theory BV of bit-vectors, i.e. fixed-size arrays of bits equipped with standard low-level machine instructions, is becoming very popular in formal verification. Standard solv...
Sébastien Bardin, Philippe Herrmann, Floria...
FCCM
2006
IEEE
162views VLSI» more  FCCM 2006»
16 years 22 days ago
Power Visualization, Analysis, and Optimization Tools for FPGAs
This paper introduces the Low-Power Intelligent Tool Environment (LITE), an object oriented tool set designed for power visualization, analysis, and optimization. These tools lever...
Matthew French, Li Wang, Michael J. Wirthlin
ICLP
2005
Springer
16 years 6 days ago
A Comparison of CLP(FD) and ASP Solutions to NP-Complete Problems
This paper presents experimental comparisons between declarative encodings of various computationally hard problems in both Answer Set Programming (ASP) and Constraint Logic Progra...
Agostino Dovier, Andrea Formisano, Enrico Pontelli
CP
2004
Springer
16 years 2 days ago
Decomposition and Learning for a Hard Real Time Task Allocation Problem
Abstract. We present a cooperation technique using an accurate management of nogoods to solve a hard real-time problem which consists in assigning periodic tasks to processors in t...
Hadrien Cambazard, Pierre-Emmanuel Hladik, Anne-Ma...
CAV
2003
Springer
145views Hardware» more  CAV 2003»
15 years 12 months ago
Monitoring Temporal Rules Combined with Time Series
Run-time monitoring of temporal properties and assertions is used for testing and as a component of execution-based model checking techniques. Traditional run-time monitoring howev...
Doron Drusinsky