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ISCA
1990
IEEE
68views Hardware» more  ISCA 1990»
15 years 10 months ago
Maximizing Performance in a Striped Disk Array
Improvements in disk speeds have not kept up with improvements in processor and memory speeds. One way to correct the resulting speed mismatch is to stripe data across many disks. ...
Peter M. Chen, David A. Patterson
EDBT
2000
ACM
15 years 9 months ago
Management and Query Processing of One-Dimensional Intervals with the UB-Tree
The management and query processing of one dimensional intervals is a special case of extended object handling. One dimensional intervals play an important role in temporal databa...
Robert Fenk
ISAAC
1995
Springer
135views Algorithms» more  ISAAC 1995»
15 years 9 months ago
The I/O - Complexity of Ordered Binary - Decision Diagram Manipulation
Ordered Binary-Decision Diagrams (OBDD) are the state-of-the-art data structure for boolean function manipulation and there exist several software packages for OBDD manipulation. ...
Lars Arge
GLVLSI
2007
IEEE
153views VLSI» more  GLVLSI 2007»
15 years 8 months ago
Address generation for nanowire decoders
Nanoscale crossbars built from nanowires can form high density memories and programmable logic devices. To integrate such nanoscale devices with other circuits, nanowire decoders ...
Jia Wang, Ming-Yang Kao, Hai Zhou
FPL
2008
Springer
138views Hardware» more  FPL 2008»
15 years 7 months ago
An efficient run-time router for connecting modules in FPGAS
It is often desirable to change the logic and/or the connections within an FPGA design on-the-fly without the benefit of a workstation or vendor CAD software. This paper presents ...
Jorge Surís, Cameron Patterson, Peter Athan...