Sciweavers

1410 search results - page 195 / 282
» A Logic for Virtual Memory
Sort
View
POPL
2003
ACM
16 years 6 months ago
Toward a foundational typed assembly language
We present the design of a typed assembly language called TALT that supports heterogeneous tuples, disjoint sums, and a general account of addressing modes. TALT also implements t...
Karl Crary
ICCD
2008
IEEE
157views Hardware» more  ICCD 2008»
16 years 3 months ago
Power-aware soft error hardening via selective voltage scaling
—Nanoscale integrated circuits are becoming increasingly sensitive to radiation-induced transient faults (soft errors) due to current technology scaling trends, such as shrinking...
Kai-Chiang Wu, Diana Marculescu
ICCD
2006
IEEE
138views Hardware» more  ICCD 2006»
16 years 3 months ago
Design and Implementation of Software Objects in Hardware
This paper proposes a novel approach to implement software object in hardware. Data-Memory mapping schemes are investigated and four hardware object design schemes are proposed an...
Fu-Chiung Cheng, Hung-Chi Wu
ICCAD
2007
IEEE
113views Hardware» more  ICCAD 2007»
16 years 3 months ago
Combinational and sequential mapping with priority cuts
An algorithm for technology mapping of combinational and sequential logic networks is proposed and applied to mapping into K-input lookup-tables (K-LUTs). The new algorithm avoids...
Alan Mishchenko, Sungmin Cho, Satrajit Chatterjee,...
TACAS
2010
Springer
142views Algorithms» more  TACAS 2010»
16 years 1 months ago
Tracking Heaps That Hop with Heap-Hop
Abstract. Heap-Hop is a program prover for concurrent heap-manipulating programs that use Hoare monitors and message-passing synchronization. Programs are annotated with pre and po...
Jules Villard, Étienne Lozes, Cristiano Cal...