1410 search results - page 189 / 282 » A Logic for Virtual Memory |
164
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ISSTA
2009
ACM
16 years 20 days ago
2009
ACM
Dynamic test generation consists of executing a program while gathering symbolic constraints on inputs from predicates encountered in branch statements, and of using a constraint ...
185
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FCCM
2005
IEEE
15 years 11 months ago
2005
IEEE
Just-in-time (JIT) compilation has been used in many applications to enable standard software binaries to execute on different underlying processor architectures. We previously in...
281
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ISCA
2011
IEEE
14 years 9 months ago
2011
IEEE
Emerging memory technologies such as STT-RAM, PCRAM, and resistive RAM are being explored as potential replacements to existing on-chip caches or main memories for future multi-co...
148
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ICCD
2006
IEEE
16 years 3 months ago
2006
IEEE
—This paper introduces the microarchitecture and logical implementation of SMT (Simultaneous Multithreading) improvement of Godson-2 processor which is a 64-bit, four-issue, out-...
161
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ASPLOS
2009
ACM
16 years 29 days ago
2009
ACM
This paper explores the architectural implications of integrating computation and molecular probes to form nanoscale sensor processors (nSP). We show how nSPs may enable new compu...