Sciweavers

1410 search results - page 176 / 282
» A Logic for Virtual Memory
Sort
View
ICPP
1995
IEEE
15 years 9 months ago
Hiding Miss Latencies with Multithreading on the Data Diffusion Machine
— Large parallel computers require techniques to tolerate the potentially large latencies of accessing remote data. Multithreadingis onesuch technique. We extend previous studies...
Henk L. Muller, Paul W. A. Stallard, David H. D. W...
AAAI
2010
15 years 7 months ago
Parallel Depth First Proof Number Search
The depth first proof number search (df-pn) is an effective and popular algorithm for solving and-or tree problems by using proof and disproof numbers. This paper presents a simpl...
Tomoyuki Kaneko
WCET
2008
15 years 7 months ago
Traces as a Solution to Pessimism and Modeling Costs in WCET Analysis
WCET analysis models for superscalar out-of-order CPUs generally need to be pessimistic in order to account for a wide range of possible dynamic behavior. CPU hardware modificatio...
Jack Whitham, Neil C. Audsley
ERSA
2004
192views Hardware» more  ERSA 2004»
15 years 7 months ago
VTSim: A Virtex-II Device Simulator
This paper introduces VTsim, a device simulator for Xilinx Virtex-II FPGAs. VTsim is currently a globally synchronous event-driven device simulator modeled at the CLB level. Throu...
Jesse Hunter, Peter Athanas, Cameron Patterson
WSCG
2004
197views more  WSCG 2004»
15 years 7 months ago
Collision Prediction Using MKtrees
In this paper, the collision prediction between polyhedra under screw motions and a static scene using a new K dimensional tree data structure (Multiresolution Kdtree, MKtree) is ...
Marta Franquesa-Niubó, Pere Brunet