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ITC
2002
IEEE
81views Hardware» more  ITC 2002»
15 years 11 months ago
Design Rewiring Using ATPG
—Logic optimization is the step of the very large scale integration (VLSI) design cycle where the designer performs modifications on a design to satisfy different constraints suc...
Andreas G. Veneris, Magdy S. Abadir, Mandana Amiri
AADEBUG
2000
Springer
15 years 11 months ago
Value Withdrawal Explanation in CSP
This work is devoted to constraint solving motivated by the debugging of constraint logic programs a la GNU-Prolog. The paper focuses only on the constraints. In this framework, c...
Gérard Ferrand, Willy Lesaint, Alexandre Te...
AGP
1999
IEEE
15 years 11 months ago
Extending clp(FD) by Negative Constraint Solving
In this paper we present a novel extension to the constraint logic programming on Finite Domains (clp(FD)) which combines the usual clp(FD) primitive constraint X in range with a ...
Antonio J. Fernández, Patricia M. Hill
AGP
1998
IEEE
15 years 11 months ago
Parsing with Non-Deterministic Functions
Parsing has been a traditional workbench for showing the virtues of declarative programming. Both logic and functional programming claim the ability of writing parsers in a natura...
Rafael Caballero, Francisco Javier López-Fr...
ASWC
2006
Springer
15 years 10 months ago
Modular Ontologies - A Formal Investigation of Semantics and Expressivity
With the growing interest in modular ontology languages to address the need for collaborative development, integration, and use of ontologies on the Web, there is an urgent need fo...
Jie Bao, Doina Caragea, Vasant Honavar