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» A High Performance Kernel-Less Operating System Architecture
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DAC
2008
ACM
15 years 8 months ago
Leakage power-aware clock skew scheduling: converting stolen time into leakage power reduction
Clock skew scheduling has been traditionally considered as a tool for improving the clock period in a sequential circuit. Timing slack is "stolen" from fast combinationa...
Min Ni, Seda Ogrenci Memik
CF
2007
ACM
15 years 10 months ago
Accelerating memory decryption and authentication with frequent value prediction
This paper presents a novel architectural technique to hide fetch latency overhead of hardware encrypted and authenticated memory. A number of recent secure processor designs have...
Weidong Shi, Hsien-Hsin S. Lee
DAC
2000
ACM
16 years 7 months ago
Memory aware compilation through accurate timing extraction
Memory delays represent a major bottleneck in embedded systems performance. Newer memory modules exhibiting efficient access modes (e.g., page-, burst-mode) partly alleviate this ...
Peter Grun, Nikil D. Dutt, Alexandru Nicolau
WWW
2008
ACM
16 years 7 months ago
Non-intrusive monitoring and service adaptation for WS-BPEL
Web service processes currently lack monitoring and dynamic (runtime) adaptation mechanisms. In highly dynamic processes, services frequently need to be exchanged due to a variety...
Oliver Moser, Florian Rosenberg, Schahram Dustdar
NSDI
2008
15 years 8 months ago
UsenetDHT: A Low-Overhead Design for Usenet
Usenet is a popular distributed messaging and file sharing service: servers in Usenet flood articles over an overlay network to fully replicate articles across all servers. Howeve...
Emil Sit, Robert Morris, M. Frans Kaashoek