1998 search results - page 246 / 400 » A Hardware Implementation of PRAM and Its Performance Evalua... |
175
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CORR
2006
Springer
15 years 6 months ago
2006
Springer
In this paper, we present our proposal to Constraint Functional Logic Programming over Finite Domains (CFLP(FD) ) with a lazy functional logic programming language which seamlessl...
184
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ISCAS
2007
IEEE
16 years 21 days ago
2007
IEEE
Abstract— This paper reports the design of a high performance, adaptive low/high swing CMOS driver circuit (mj–driver) suitable for driving of global interconnects with large c...
180
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IEEEPACT
2005
IEEE
16 years 2 days ago
2005
IEEE
Transactional Coherence and Consistency (TCC) is a novel coherence scheme for shared memory multiprocessors that uses programmer-defined transactions as the fundamental unit of p...
146
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ISLPED
2003
ACM
15 years 11 months ago
2003
ACM
Modern superscalar processors implement precise interrupts by using the Reorder Buffer (ROB). In some microarchitectures , such as the Intel P6, the ROB also serves as a repositor...
197
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IPPS
1998
IEEE
15 years 10 months ago
1998
IEEE
Traditionally, tracking systems require dedicated hardware to handle the computational demands and input/output rates imposed by real-time video sources. An alternative presented i...