1998 search results - page 236 / 400 » A Hardware Implementation of PRAM and Its Performance Evalua... |
148
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FPL
2007
Springer
16 years 20 days ago
2007
Springer
In this paper, we present a shared instruction and data memory controller for the On-Chip Memory (OCM) bus of the PowerPC embedded in the Virtex-4 chip. The traditional design of ...
172
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ASPDAC
2006
ACM
16 years 15 days ago
2006
ACM
- This paper presents a DSP core for multi-core media SoC, which is optimized to execute a set of signal processing tasks very efficiently. The fully-programmable core has a data-c...
169
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PADS
2003
ACM
15 years 11 months ago
2003
ACM
There is a wide-spread usage of hardware design languages(HDL) to speed up the time-to-market for the design of modern digital systems. Verification engineers can simulate hardwa...
166
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ISCAS
2002
IEEE
15 years 11 months ago
2002
IEEE
A technique for computing the switching activity of synchronous Finite State Machine (FSM) implementations including the influence of temporal correlation among the next state si...
168
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VISUALIZATION
2002
IEEE
15 years 11 months ago
2002
IEEE
We present a new algorithm for rendering very large volume data sets at interactive framerates on standard PC hardware. The algorithm accepts scalar data sampled on a regular grid...