1998 search results - page 229 / 400 » A Hardware Implementation of PRAM and Its Performance Evalua... |
167
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ISCA
2002
IEEE
15 years 11 months ago
2002
IEEE
Microprocessor clock frequency has improved by nearly 40% annually over the past decade. This improvement has been provided, in equal measure, by smaller technologies and deeper p...
158
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ISCA
2002
IEEE
15 years 11 months ago
2002
IEEE
An instruction set architecture (ISA) suitable for future microprocessor design constraints is proposed. The ISA has hierarchical register files with a small number of accumulator...
165
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ICCAD
1999
IEEE
15 years 10 months ago
1999
IEEE
Algorithmic logic synthesis is usually carried out in two stages, the independent stage where logic minimization is performed on the Boolean equations with no regard to physical p...
165
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ATC
2008
Springer
15 years 8 months ago
2008
Springer
In this paper, we introduce new concepts and methods for checking the correctness of control flow instructions during the execution of programs in embedded CPUs. Detecting and avoi...
250
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MOBILIGHT
2010
15 years 4 months ago
2010
Abstract. This paper describes a framework for the design space exploration of resource-efficient software-defined radio architectures. This design space exploration is based on a ...