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PACS
2000
Springer
118views Hardware» more  PACS 2000»
15 years 10 months ago
Ramp Up/Down Functional Unit to Reduce Step Power
Because the inductive noise Ldi/dt is induced by the power change and can have disastrous impact on the timing and reliability of the system, high-performance CPU designs are more ...
Zhenyu Tang, Norman Chang, Shen Lin, Weize Xie, O....
EIT
2008
IEEE
15 years 8 months ago
Experiments in attacking FPGA-based embedded systems using differential power analysis
Abstract--In the decade since the concept was publicly introduced, power analysis attacks on cryptographic systems have become an increasingly studied topic in the computer securit...
Song Sun, Zijun Yan, Joseph Zambreno
DATE
2009
IEEE
122views Hardware» more  DATE 2009»
16 years 1 months ago
A hybrid packet-circuit switched on-chip network based on SDM
—In this paper, we propose a novel on-chip communication scheme by dividing the resources of a traditional packet-switched network-on-chip between a packet-switched and a circuit...
Mehdi Modarressi, Hamid Sarbazi-Azad, Mohammad Arj...
DATE
2009
IEEE
171views Hardware» more  DATE 2009»
16 years 1 months ago
Automatic generation of streaming datapaths for arbitrary fixed permutations
Abstract—This paper presents a technique to perform arbitrary fixed permutations on streaming data. We describe a parameterized architecture that takes as input n data points st...
Peter A. Milder, James C. Hoe, Markus Püschel
SBACPAD
2009
IEEE
155views Hardware» more  SBACPAD 2009»
16 years 1 months ago
SPARC16: A New Compression Approach for the SPARC Architecture
RISC processors can be used to face the ever increasing demand for performance required by embedded systems. Nevertheless, this solution comes with the cost of poor code density. ...
Leonardo Luiz Ecco, Bruno Cardoso Lopes, Eduardo C...