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ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
16 years 3 months ago
Flip-flop insertion with shifted-phase clocks for FPGA power reduction
— Although the LUT (look-up table) size of FPGAs has been optimized for general applications, complicated designs may contain a large number of cascaded LUTs between flip-flops...
Hyeonmin Lim, Kyungsoo Lee, Youngjin Cho, Naehyuck...
ICCAD
2004
IEEE
191views Hardware» more  ICCAD 2004»
16 years 3 months ago
Checking consistency of C and Verilog using predicate abstraction and induction
edicate Abstraction and Induction Edmund Clarke Daniel Kroening June 25, 2004 CMU-CS-04-131 School of Computer Science Carnegie Mellon University Pittsburgh, PA 15213 It is common...
Daniel Kroening, Edmund M. Clarke
SOSP
2007
ACM
16 years 3 months ago
Information flow control for standard OS abstractions
ion Flow Control for Standard OS Abstractions Maxwell Krohn Alexander Yip Micah Brodsky Natan Cliffer M. Frans Kaashoek Eddie Kohler† Robert Morris MIT CSAIL †UCLA http://flum...
Maxwell N. Krohn, Alexander Yip, Micah Z. Brodsky,...
CVPR
2010
IEEE
16 years 3 months ago
Linear View Synthesis Using a Dimensionality Gap Light Field Prior
Acquiring and representing the 4D space of rays in the world (the light field) is important for many computer vision and graphics applications. Yet, light field acquisition is c...
Anat Levin, Fredo Durand
HRI
2010
ACM
16 years 1 months ago
Validating interaction patterns in HRI
— In recent work, “interaction patterns” have been proposed as a means to characterize essential features of humanrobot interaction. A problem arises, however, in knowing whe...
Peter H. Kahn Jr., Brian T. Gill, Aimee L. Reicher...
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