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» A General Semantics for Evaluation Logic
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FPGA
2010
ACM
209views FPGA» more  FPGA 2010»
16 years 3 months ago
FPGA power reduction by guarded evaluation
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
Chirag Ravishankar, Jason Helge Anderson
ECAI
2004
Springer
15 years 12 months ago
Plausibility Structures for Default Reasoning
Friedman and Halpern have introduced the inference by plausibility structures, which provides semantics for various default logics. This is a generalization of known inferences, su...
Yves Moinard
SEMWEB
2004
Springer
15 years 12 months ago
Query Answering for OWL-DL with Rules
Both OWL-DL and function-free Horn rules3 are decidable logics with interesting, yet orthogonal expressive power: from the rules perspective, OWL-DL is restricted to tree-like rule...
Boris Motik, Ulrike Sattler, Rudi Studer
LOGCOM
2007
59views more  LOGCOM 2007»
15 years 6 months ago
Forgetting Literals with Varying Propositional Symbols
Recently, the old logical notion of forgetting propositional symbols (or reducing the logical vocabulary) has been generalized to a new notion: forgetting literals. The aim was to...
Yves Moinard
PUC
2008
113views more  PUC 2008»
15 years 6 months ago
Design and evaluation of systems to support interaction capture and retrieval
Although many recent systems have been built to support Information Capture and Retrieval (ICR), these have not generally been successful. This paper presents studies that evaluate...
Steve Whittaker, Simon Tucker, Kumutha Swampillai,...