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DAC
2005
ACM
16 years 7 months ago
Race-condition-aware clock skew scheduling
The race conditions often limit the smallest feasible clock period that the optimal clock skew scheduling can achieve. Therefore, the combination of clock skew scheduling and dela...
Shih-Hsu Huang, Yow-Tyng Nieh, Feng-Pin Lu
DAC
2005
ACM
16 years 7 months ago
An efficient algorithm for statistical minimization of total power under timing yield constraints
Power minimization under variability is formulated as a rigorous statistical robust optimization program with a guarantee of power and timing yields. Both power and timing metrics...
Murari Mani, Anirudh Devgan, Michael Orshansky
DAC
2005
ACM
16 years 7 months ago
Microarchitecture-aware floorplanning using a statistical design of experiments approach
Since across-chip interconnect delays can exceed a clock cycle in nanometer technologies, it has become essential in high performance designs to add flip-flops on wires with multi...
Vidyasagar Nookala, Ying Chen, David J. Lilja, Sac...
DAC
2005
ACM
16 years 7 months ago
Freeze: engineering a fast repeater insertion solver for power minimization using the ellipsoid method
This paper presents a novel repeater insertion algorithm for the power minimization of realistic interconnect trees under given timing budgets. Our algorithm judiciously combines ...
Yuantao Peng, Xun Liu
DAC
2005
ACM
16 years 7 months ago
Diffusion-based placement migration
Placement migration is the movement of cells within an existing placement to address a variety of post-placement design closure issues, such as timing, routing congestion, signal ...
Haoxing Ren, David Zhigang Pan, Charles J. Alpert,...