1420 search results - page 66 / 284 » A Framework for Scheduler Synthesis |
149
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ASPDAC
2008
ACM
15 years 8 months ago
2008
ACM
This paper proposes a novel Behavioral Synthesis method that improves performance of synthesized circuits utilizing specialized functional units effectively. Specialized functional...
167
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ASPDAC
2008
ACM
15 years 8 months ago
2008
ACM
In deep submicron technology, wire delay is no longer negligible and is gradually dominating the system latency. Some state-of-the-art architectural synthesis flows adopt the distr...
163
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ISVLSI
2005
IEEE
15 years 11 months ago
2005
IEEE
— Direct tunneling current is the major component of static power dissipation of a CMOS circuit for technology below 65nm, where the gate dielectric (SiO2) is very low. We intuit...
199
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CSREAESA
2004
15 years 7 months ago
2004
The growing software content in various battery-driven embedded systems has led to significant interest in technologies for energy-efficient embedded software. While lowenergy sof...
178
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FPGA
2007
ACM
16 years 8 days ago
2007
ACM
Power consumption in field programmable gate arrays (FPGAs) has become an important issue as the FPGA market has grown to include mobile platforms. In this work we present a power...