1420 search results - page 64 / 284 » A Framework for Scheduler Synthesis |
215
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ISPDC
2008
IEEE
16 years 15 days ago
2008
IEEE
This paper presents a new approach for analyzing the performance of grid scheduling algorithms for tasks with dependencies. Finding the optimal procedures for DAG scheduling in Gr...
159
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COR
2010
15 years 4 months ago
2010
We consider the context of decision support for schedule modification after the computation off-line of a predictive optimal (or near optimal) schedule. The purpose of this work i...
153
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ISPD
2003
ACM
15 years 11 months ago
2003
ACM
For multi-gigahertz designs in nanometer technologies, data transfers on global interconnects take multiple clock cycles. In this paper, we propose a regular distributed register ...
164
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ISPD
2000
ACM
15 years 10 months ago
2000
ACM
In this paper, we propose a new clock tree synthesis method for semi-synchronous circuits. A clock tree obtained by the proposed method is a multi-level multi-way clock tree such ...
173
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DATE
1999
IEEE
15 years 10 months ago
1999
IEEE
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...