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» A Framework for Scheduler Synthesis
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DAC
2000
ACM
16 years 7 months ago
Unifying behavioral synthesis and physical design
eously demand shorter and less costly design cycles. Designing at higher levels of abstraction makes both objectives achievable, but enabling techniques like behavioral synthesis h...
William E. Dougherty, Donald E. Thomas
DATE
1998
IEEE
165views Hardware» more  DATE 1998»
15 years 10 months ago
AGENDA: An Attribute Grammar Driven Environment for the Design Automation of Digital Systems
Attribute grammars have been used extensively in every phase of traditional compiler construction. Recently, it has been shown that they can also be effectively adopted to handle ...
George Economakos, George K. Papakonstantinou, Pan...
DAC
1996
ACM
15 years 10 months ago
Introspection: A Low Overhead Binding Technique During Self-Diagnosing Microarchitecture Synthesis
Abstract: Introspection, a zero-overhead binding technique during self-diagnosing microarchitecture synthesis is presented. Given a scheduled control data ow graph (CDFG) introspec...
Balakrishnan Iyer, Ramesh Karri
ICCAD
1994
IEEE
99views Hardware» more  ICCAD 1994»
15 years 10 months ago
Condition graphs for high-quality behavioral synthesis
Identifying mutual exclusiveness between operators during behavioral synthesis is important in order to reduce the required number of control steps or hardware resources. To impro...
Hsiao-Ping Juan, Viraphol Chaiyakul, Daniel D. Gaj...
ICCAD
1997
IEEE
86views Hardware» more  ICCAD 1997»
15 years 10 months ago
Micro-preemption synthesis: an enabling mechanism for multi-task VLSI systems
- Task preemption is a critical enabling mechanism in multi-task VLSI systems. On preemption, data in the register les must be preserved in order for the task to be resumed. This e...
Kyosun Kim, Ramesh Karri, Miodrag Potkonjak