1420 search results - page 231 / 284 » A Framework for Scheduler Synthesis |
163
click to vote
JFR
2010
15 years 27 days ago
2010
This paper presents a solution to the problem of unsupervised classification of dynamic obstacles in urban environments. A track-based model is introduced for the integration of 2...
174
click to vote
VLSID
2006
IEEE
16 years 3 days ago
2006
IEEE
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
172
click to vote
INFOCOM
2005
IEEE
15 years 11 months ago
2005
IEEE
— While earlier studies have pointed out that short-lived TCP flows (mice) may hurt long-lived TCP flows (elephants) in the long term, they provide insufficient insight for devel...
180
click to vote
DATE
2004
IEEE
15 years 9 months ago
2004
IEEE
Code optimization and high level synthesis can be posed as constraint satisfaction and optimization problems, such as graph coloring used in register allocation. Graph coloring is...
185
click to vote
FMCAD
2000
Springer
15 years 9 months ago
2000
Springer
Image computation nds wide application in VLSI CAD, such as state reachability analysis in formal veri cation and synthesis, combinational veri cation, combinational and sequential...