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ISCA
2003
IEEE
104views Hardware» more  ISCA 2003»
15 years 11 months ago
Token Coherence: Decoupling Performance and Correctness
Many future shared-memory multiprocessor servers will both target commercial workloads and use highly-integrated “glueless” designs. Implementing low-latency cache coherence i...
Milo M. K. Martin, Mark D. Hill, David A. Wood
IWOMP
2010
Springer
15 years 10 months ago
A ROSE-Based OpenMP 3.0 Research Compiler Supporting Multiple Runtime Libraries
OpenMP is a popular and evolving programming model for shared-memory platforms. It relies on compilers to target modern hardware architectures for optimal performance. A variety of...
Chunhua Liao, Daniel J. Quinlan, Thomas Panas, Bro...
CIKM
2009
Springer
15 years 10 months ago
Heterogeneous cross domain ranking in latent space
Traditional ranking mainly focuses on one type of data source, and effective modeling still relies on a sufficiently large number of labeled or supervised examples. However, in m...
Bo Wang, Jie Tang, Wei Fan, Songcan Chen, Zi Yang,...
EUROPAR
2009
Springer
15 years 10 months ago
MyriXen: Message Passing in Xen Virtual Machines over Myrinet and Ethernet
Data access in HPC infrastructures is realized via user-level networking and OS-bypass techniques through which nodes can communicate with high bandwidth and low-latency. Virtualiz...
Anastassios Nanos, Nectarios Koziris
FOCS
2000
IEEE
15 years 10 months ago
Opportunistic Data Structures with Applications
There is an upsurging interest in designing succinct data structures for basic searching problems (see [23] and references therein). The motivation has to be found in the exponent...
Paolo Ferragina, Giovanni Manzini