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» A Formalization of Software Architecture
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CODES
2009
IEEE
16 years 1 months ago
Using binary translation in event driven simulation for fast and flexible MPSoC simulation
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
Marius Gligor, Nicolas Fournel, Frédé...
IPPS
2009
IEEE
16 years 1 months ago
Portable builds of HPC applications on diverse target platforms
—High-end machines at modern HPC centers are constantly undergoing hardware and system software upgrades – necessitating frequent rebuilds of application codes. The number of p...
Magdalena Slawiñska, Jaroslaw Slawinski, Va...
MICRO
2009
IEEE
315views Hardware» more  MICRO 2009»
16 years 1 months ago
Control flow obfuscation with information flow tracking
Recent micro-architectural research has proposed various schemes to enhance processors with additional tags to track various properties of a program. Such a technique, which is us...
Haibo Chen, Liwei Yuan, Xi Wu, Binyu Zang, Bo Huan...
OTM
2009
Springer
16 years 1 months ago
TMBean: Optimistic Concurrency in Application Servers Using Transactional Memory
Abstract. In this experience report, we present an evaluation of different techniques to manage concurrency in the context of application servers. Traditionally, using entity beans...
Lucas Charles, Pascal Felber, Christophe Gêt...
CGO
2006
IEEE
16 years 20 days ago
BIRD: Binary Interpretation using Runtime Disassembly
The majority of security vulnerabilities published in the literature are due to software bugs. Many researchers have developed program transformation and analysis techniques to au...
Susanta Nanda, Wei Li, Lap-Chung Lam, Tzi-cker Chi...
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