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» A Formal Ontology of Properties
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FMCAD
2000
Springer
15 years 10 months ago
Model Checking Synchronous Timing Diagrams
Abstract. Model checking is an automated approach to the formal verification of hardware and software. To allow model checking tools to be used by the hardware or software designer...
Nina Amla, E. Allen Emerson, Robert P. Kurshan, Ke...
CLEIEJ
2004
106views more  CLEIEJ 2004»
15 years 6 months ago
A Calculus for Reconfigurable Component-Based Systems
ept of reconfigurable systems is almost always restricted to the abstract design level, in which configuration languages are used to manipulate software connections. In this paper...
Cidcley Teixeira de Souza, Paulo Roberto Freire Cu...
WWW
2006
ACM
16 years 7 months ago
Exploring social annotations for the semantic web
In order to obtain a machine understandable semantics for web resources, research on the Semantic Web tries to annotate web resources with concepts and relations from explicitly d...
Xian Wu, Lei Zhang, Yong Yu
GLVLSI
2009
IEEE
150views VLSI» more  GLVLSI 2009»
16 years 1 months ago
Contradictory antecedent debugging in bounded model checking
In the context of formal verification Bounded Model Checking (BMC) has shown to be very powerful for large industrial designs. BMC is used to check whether a circuit satisfies a...
Daniel Große, Robert Wille, Ulrich Kühn...
CODES
2007
IEEE
16 years 29 days ago
Probabilistic performance risk analysis at system-level
We present a novel hybrid approach for performance analysis of a system design. Unlike other approaches in this area, in this paper we do not focus on the determination of pessimi...
Alexander Viehl, Markus Schwarz, Oliver Bringmann,...