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ISCAS
2005
IEEE
167views Hardware» more  ISCAS 2005»
16 years 5 days ago
A novel 2D filter design methodology
Abstract— In many image processing applications, fast convolution of an image with a large 2D filter is required. Field Programable Gate Arrays (FPGAs) are often used to achieve...
Christos-Savvas Bouganis, George A. Constantinides...
ISCAS
2005
IEEE
125views Hardware» more  ISCAS 2005»
16 years 5 days ago
Fixed-current method for programming large floating-gate arrays
Speed and Accuracy of programming large floating gate array is limited by precision of current measurement and pulse generator. In this paper a novel floating gate programming m...
Shantanu Chakrabartty, Gert Cauwenberghs
ISPASS
2005
IEEE
16 years 5 days ago
Accelerating Multiprocessor Simulation with a Memory Timestamp Record
We introduce a fast and accurate technique for initializing the directory and cache state of a multiprocessor system based on a novel software structure called the memory timestam...
Kenneth C. Barr, Heidi Pan, Michael Zhang, Krste A...
ITCC
2005
IEEE
16 years 5 days ago
Byteprints: A Tool to Gather Digital Evidence
In this paper, we present techniques to recover useful information from disk drives that are used to store user data. The main idea is to use a logging mechanism to record the mod...
Sriranjani Sitaraman, Srinivasan Krishnamurthy, Su...
ITRE
2005
IEEE
16 years 5 days ago
Structure learning of Bayesian networks using a semantic genetic algorithm-based approach
A Bayesian network model is a popular technique for data mining due to its intuitive interpretation. This paper presents a semantic genetic algorithm (SGA) to learn a complete qual...
Sachin Shetty, Min Song